As semiconductor technology advances, the performance of microelectronic devices such as integrated circuits (also referred to herein as semiconductor chips or chips) increases. Such increased performance, as measured, for example, by clock speed and complexity of chips, has resulted in higher power dissipation of these chips. In addition, device dimensions have reached a point where leakage currents make a significant additional contribution to power dissipation of chips. As a result of these issues, cooling has become an important factor that limits progress in semiconductor electronics.
At present, chip power is limited to approximately 200 watts by the existing ability to cool the chip and maintain chip junction temperatures at an average of about 85° C. This chip power limit of 200 watts is projected by the International Technology Roadmap for Semiconductors to remain static. At present maximum chip sizes of approximately 300 mm2 the 200 watt limit corresponds to a thermal flux of approximately 60-70 watts/cm2. In addition, recent semiconductor chip designs show further limitation due to hot spots that occur at local regions of the chip, depending upon the circuits being activated.
A standard practice for cooling a high power chip is to attach the chip to a thermally conductive plate (referred to as a heat spreader) using a thermally conductive die attach adhesive, and to attach the heat spreader to a heat sink using a thermally conductive paste or a thermal elastomeric pad. The heat spreader spreads heat generated by the chip to an area larger than that of the chip, and the thermal flux output from the heat spreader to the heat sink is considerably less than that output from the chip to the heat spreader by reason of its having been spread over a larger area (i.e., the larger area of the heat spreader proportionately reduces the thermal flux). Thermal flux output from the heat spreader to the heat sink is conducted relatively efficiently through a thermal paste or thermal pad interposed between the heat spreader and the heat sink. Conventional heat sinks typically include convection cooled fin structures, fan cooled fin structures, and liquid-cooled platens. However, at higher levels of chip power, the above-described standard practice has limitations.
One such limitation with the standard practice is a problem in finding a material for the heat spreader that has a high thermal conductivity and a low coefficient of thermal expansion (CTE). A high thermal conductivity material is needed to spread the thermal flux over a large area to match the area of the heat sink, and a low CTE material is needed so the heat spreader does not induce stress or damage to a chip mounted thereon. For example, copper has a high thermal conductivity of 3.97 watts/cm-° C. and a high CTE of 17.7×10−6/° C. The large mismatch between the CTE of silicon, i.e., 2.8×10−6/° C., and the CTE of copper, i.e., 17.7×10−6/° C., would cause warping and damage to a large chip if it were mounted directly on a copper heat spreader.
Since no inexpensive heat spreader material exists having high thermal conductivity and low CTE, the industry commonly uses a practical compromise in which a material of moderate thermal conductivity and CTE is used for the heat spreader. For example, a copper-tungsten composite material CMC111 available from Tokyo Tungsten Co. Ltd. that is commonly used for the heat spreader exhibits a thermal conductivity of about 2.6 watts/cm-° C. and a CTE of about 9.2×10−6/° C. In addition to a reduced CTE heat spreader, large chips such as microprocessors require a compliant die attach material be used to attach the chip to the heat spreader to further reduce thermal stress induced on the chip by temperature changes. Compliant die attach materials such as particle filled silicone films, thermally conductive pads, and phase change materials cannot provide the high thermal conductivity of a direct rigid connection. This practical compromise provides limited thermal performance because of the reduced thermal conductivity of the heat spreader and because of the relatively high thermal resistance of compliant die attach materials. The thermal efficiency thus provided is no longer adequate for cooling high performance chips.
The electronics industry has made advances in chip cooling technology to meet demands for more efficient cooling. Many of these advances have been applied to mainframe computer technology, but most remain too costly for general use. One of the more successful approaches is an IBM thermally cooled module (TCM) that uses spring-loaded pistons pressing on chips sealed in a helium filled module. The TCM solves a problem of thermal expansion mismatch by using a piston that slidably contacts the chip surface. Although the TCM is too expensive for general use, the thermal performance is still insufficient for future cooling requirements.
Another approach to improve thermal performance is to use a solid diamond slab as a thermal spreader. The material has a thermal conductivity of about 20 watts/cm-° C. and a low CTE of about 2.3×10−6/° C. that more closely matches the CTE of silicon. However, the cost of diamond has so far proven prohibitive.
Still another approach to improve thermal performance is to immerse a chip directly in a flow of liquid coolant or refrigerant. Microgrooves on the chip surface provide more efficient thermal transfer of heat from the chip to the liquid. Approaches of this nature are limited by boiling of the liquid, which boiling produces a gas pocket on the chip surface that inhibits efficient thermal transfer. Typical solutions to the problem of boiling entail controlling nucleation of boiling at points on the chip surface. While controlling nucleation of boiling improves thermal transfer, the resulting thermal performance is inadequate to cool high performance chips in the future.
Still another approach to improve thermal performance uses micro-channels etched directly in a chip to provide a larger area for thermal transfer between a cooling liquid and the chip. A spray of liquid coolant on the back of the chip is used in an attempt to reduce the effects of boiling in limiting performance. The cost and technical problems associated with sealing the chip to prevent liquid from leaking onto electronic equipment have limited widespread use of liquid immersion solutions in cooling semiconductor chips. For example, sheets and chip enclosures have been proposed as solutions to the problem of leakage of liquids. Because a thermally conductive sheet typically has a high CTE, the sheet is typically attached to the chip using a compliant or a sliding contact. As in the case of the heat spreader, the compliant attachment material has a relatively high thermal resistance that limits thermal performance of the sheet as a solution to containing liquids used to cool the chip.
In light of the above, there is a need in the art for method and apparatus useful for cooling high performance chips that solve one or more of the above-identified problems to enable the semiconductor industry to progress to smaller and faster chip designs.